The EEPROM also called the E2PROM is a form of semiconductor memory chip that has been in use for many years. The initials EEPROM stand for Electrically Erasable Programmable Read Only Memory and this gives an insight into its method of operation.
The EEPROM is a form of non-volatile memory where individual bytes of data can be erased and reprogrammed.
Development of the EEPROM
EEPROM / E2PROM technology was one of the first forms of non-volatile semiconductor memory chip. Its development came out of the standard EPROM technology that was widespread in the late 1970s and 1980s. These EPROM memories could be programmed, typically with machine software, and then later erased by exposing the chip to UV light if the software needed to be changed.
Although the erasure process took an hour or so, this was quite acceptable for development environments. However these semiconductor memories could not be erased electrically, and a totally electrical arrangement would have been more convenient.
In 1983, a development group at Intel under the leadership of George Perlegos developed a technology based on the existing EPROM technology. With an addition to the existing EPROM structure, the new EEPROM memory could be erased and programmed electrically. The first EEPROM device launched onto the market was the Intel 2816.
Later many of those with EEPROM development experience left Intel and set up a new company named Seeq Technology which developed and manufactured further EEPROM technology and other semiconductor memory devices.
What is EEPROM / E2PROM
The advantage of an EEPROM memory, apart from the fact that the data stored is non-volatile, is that it is possible to read data from it and also erase it and write data to it. To erase the data, a relatively high voltage is required, and early EEPROMs needed an external high voltage source. Later versions of these memory chips recognised the difficulty in many circuit designs of having an extra supply just for the EEPROM, and they incorporated the high voltage source within the EEPROM chip. In this way the memory device could run from a single supply, thereby considerably reducing the cost of an overall circuit using an EEPROM and simplifying the design.
When using an EEPROM it is necessary to remember that the read and write cycles are performed much slower than those experienced with RAM. As a result it is necessary to use the data stored in the EEPROM memory in such a way that this does not impede the operation of the overall system. Typically the data stored in it can be downloaded at start-up. It is also important to note that Write and erase operations are performed on a byte per byte basis.
EEPROM memory uses the same basic principle that is used by EPROM memory technology. Although there are several different memory cell configurations that can be used the basic principle that is behind each memory cell is the same.
Often the memory cell will comprise two field effect transistors. One of these is the storage transistor. This has what is termed a floating gate. Electrons can be made to become trapped in this gate, and the presence or absence of electrons then equates to the data stored there.
The other transistor generally in the memory cell is what is known as the access transistor and it is required for the operational aspects of the EEPROM memory cell.
Serial & parallel EEPROM memory
Within the overall EEPROM family of memory devices, there are two main memory types that are available. The actual way in which the memory device is operated depends upon the flavour or memory type and hence its electrical interface.
- Serial EEPROM memory: The serial EEPROMs or E2PROMs are more difficult to operate as a result of the fact that there are fewer pins are operations must be performed in a serial manner. As the data is transferred in a serial fashion, this also makes them much slower than their parallel EEPROM counterparts.
There are several standard interface types: SPI, I2C, Microwire, UNI/O, and 1-Wire are five common types. These interfaces require between 1 and 4 controls signals for operation. A typical EEPROM serial protocol consists of three phases: OP-Code Phase, Address Phase and Data Phase. The OP-Code is usually the first 8-bits input to the serial input pin of the EEPROM device (or with most I²C devices, is implicit); followed by 8 to 24 bits of addressing depending on the depth of the device, then the read or write data.
Using these interfaces these semiconductor memory devices may be contained within an eight pin package. The result that the packages for these memory devices can be made so small is their chief advantage.
- Parallel EEPROM memory: Parallel EEPROM or E2PROM devices normally have an 8 bit wide bus. Using a parallel bus like this enables it to cover the complete memory of many smaller processor applications. Typically, devices have chip select and write protect pins and some microcontrollers used to have an integrated parallel EEPROM for storage of the software.
The operation of a parallel EEPROM is faster than that of a comparable serial EEPROM or E2PROM, and also the operation is simpler than that of an equivalent serial EEPROM. The disadvantages are that parallel EEPROMs are larger as a result of the higher pin count. Also they have been decreasing in popularity in favour of serial EEPROM or Flash as a result of convenience and cost. Today, Flash memory offers better performance at an equivalent cost, whereas serial EEPROMs offer advantages of small size.
EEPROM memory failure modes
One of the main problems with EEPROM technology is its overall reliability. This has also lead to a reduction in their use as other types of memory are able to provide a much better level of reliability. There are two main ways in which these memory devices can fail:
- Data retention time: The data retention time is very important, especially if the EEPROM contains software that is required for the operation of an item of electronics equipment, e.g. boot software, etc. The data retention period is limited for EEPROM, E2PROM because of the fact that during storage, the electrons injected into the floating gate may drift through the insulator because it is not a perfect insulator. This causes any charge being stored in the floating gate to be lost and the memory cell will revert to its erased state. The time taken for this to happen is very long, and manufacturers usually guarantee data retention of 10 years or more for most devices, although temperature does have an effect.
- Data endurance: It is found that during the rewrite operations of the EEPROM memory, the gate oxide in the floating-gate transistors of the memory cell gradually accumulate trapped electrons. The electric field associated with these trapped electrons combines with that of the wanted electrons in the floating gate. As a result the state where there are no electrons in the floating gate still has a residual field, and as this rises as more electrons become trapped, a condition eventually rises when it is not possible to differentiate between the threshold for the zero state cannot be detected and the cell is stuck in programmed state. The manufacturers usually specify minimal number of rewrite cycles being 10 million or more
Despite these failure and lifetime mechanisms, the EEPROM is still widely sued and its performance is normally satisfactory for most applications. For areas where the lifetime is unlikely to exceed 10 years and where the number of read/write cycles is limited the EEPROM will perform very well. Also the performance will be able the manufacturers stated minima, although this should obviously not be relied upon within the design.
Although Flash memory has taken over from EEPROM / E2PROM in many areas, this form of memory technology is still used in some areas. It has the ability to be able to erase or write a single byte of data which some forms of memory are unable to do - a complete block needs to be erased or written. As such the EEPROM still finds use in various applications.